Anyone who has taught an integrated circuit design course knows the paperwork that precedes the first lecture. The foundry's kit arrives under a non-disclosure agreement signed by the institution. It may be installed only on designated machines, and students must be registered before they see it. Layouts may not appear in a thesis without clearance. Screenshots in a set of lecture slides are a grey area, and placing the course material on a public repository is out of the question. None of this is unreasonable from the foundry's side, since a process design kit (PDK) encodes hard-won knowledge of a manufacturing process, but its cumulative effect on teaching is large and seldom discussed.

In 2020 a 130 nm CMOS process from SkyWater Technology became the first for which a foundry-backed, manufacturable PDK was published under an open licence, in a collaboration with Google (Edwards, 2020). A 180 nm kit from GlobalFoundries followed in 2022, and IHP in Germany has since opened a 130 nm BiCMOS process. Alongside them an open-source tool flow able to take a design from hardware description to mask layout has matured (Ajayi et al., 2019; Shalan and Edwards, 2020). This article argues that these developments could change the way universities teach chip design, considers the reasons for doubt, and suggests how a department might respond.

Chip design was not always taught this way. The textbook of Mead and Conway (1980) deliberately separated design from fabrication. It gave students a set of simplified, scalable layout rules that were independent of any one manufacturer, and courses built on it spread quickly through universities, as Conway (2012) later recounted. The MOSIS service then gathered student and research designs onto shared wafers so that the cost of a fabrication run was divided among many users (Tomovich, 1988). The rules students worked with were public, and a layout could be printed in a textbook.

That openness did not survive the growing complexity of the processes. As feature sizes fell, simple scalable rules gave way to long foundry-specific rule decks, and device models became detailed descriptions of a proprietary technology. Foundries protected both by contract. Universities continued to gain access through MOSIS and its counterparts elsewhere, but as licensees. The teaching community responded with predictive kits that describe a plausible process and correspond to no real one: FreePDK for a 45 nm generation (Stine et al., 2007) and ASAP7 for a 7 nm FinFET generation (Clark et al., 2016). These can be shared freely, and they remain valuable, but nothing designed with them can be manufactured. Figure 1 places these developments in sequence.

The central claim of this article is that an open, manufacturable PDK removes constraints that instructors have worked around for so long that they no longer notice them. Table 1 contrasts the two situations. The differences fall under four heads: completeness, inspectability, portability and the possibility of silicon.

Completeness comes first. With an open kit and the OpenROAD-based flow, a student can take a small processor core from register-transfer description through synthesis with Yosys (Wolf and Glaser, 2013), placement, clock tree construction, routing and sign-off checks, on a laptop, in the span of a laboratory course. Memory blocks can be generated with OpenRAM (Guthaus et al., 2016). Custom layout and extraction use Magic, a tool whose origins lie in university teaching (Ousterhout et al., 1984), and circuit simulation uses descendants of the original SPICE (Nagel and Pederson, 1973). Many courses stop at simulation or at a field-programmable gate array because the rest of the path is too awkward to provision. That reason weakens.

Inspectability is the second head, and it bears most on analog and device teaching. Textbooks explain design with simplified transistor equations and then warn that real devices behave differently (Razavi, 2017). In a commercial kit the model files that embody the difference are frequently encrypted. In an open kit a student can read the model cards, plot the characteristics of every device the process offers, and see how a design rule relates to the layers it constrains. The textbook treatment of layout rules and their physical origin (Weste and Harris, 2011) can be set beside a real rule deck instead of an idealised one.

Portability concerns what happens to the work afterwards. A design made with an open kit belongs to the student in a practical sense: it can be placed in a public repository, examined by a prospective employer, extended by the next cohort and cited by a researcher who wishes to reproduce it. Instructors can exchange complete laboratory exercises, including reference layouts, in the way that programming courses exchange code. The parallel with the open RISC-V instruction set, whose proponents made the same argument for processor architecture (Asanović and Patterson, 2014), is close.

The fourth is silicon. Multi-project shuttles on the open processes have allowed student designs to be fabricated and returned as packaged parts, and community schemes that pool very small designs onto a shared die have lowered the cost of entry further. Measuring a chip of one's own design teaches things that no simulation does, among them that the first version rarely works as intended.

The case can be overstated, and four objections deserve a direct answer. The first is that the open processes are old. A 130 nm planar technology has none of the features that occupy designers at the leading edge: no fin or nanosheet devices, no multiple patterning, no restrictive unidirectional routing. A graduate who has only seen such a process will find much that is unfamiliar in industry. This is true, and it argues for teaching the principles on an open mature node and the particular difficulties of advanced nodes with a predictive kit such as ASAP7. It does not argue for teaching neither in the open.

The second objection concerns tools. Commercial design automation is the product of decades of investment, and the open flow is behind it in quality of results, capacity and above all in analog and mixed-signal verification. Kahng (2020) asks plainly who will use and sustain open tools once they are built. For teaching, a tool that exposes its algorithms and can be modified has pedagogical value that partly offsets lower performance. Students nevertheless need to know that production practice differs.

Third, employers recruit for experience with commercial flows, and established laboratory courses are built around them. A department that replaced them wholesale would do its graduates a disservice. The fourth objection is sustainability. Fabrication runs on the open processes have relied to a considerable degree on corporate sponsorship, and sponsorship can be withdrawn. Model accuracy and kit maintenance likewise depend on a small number of committed people. A curriculum should be designed so that it still works if free fabrication disappears, with silicon as an enrichment and the open design flow as the core.

If the argument holds, the sensible response is a layered curriculum. Introductory and intermediate courses would use an open kit and open tools throughout, so that every student completes at least one design to verified layout and can keep it. Advanced courses would add a commercial flow under the usual agreements and a predictive advanced-node kit, with the open flow as the common reference against which the differences are explained. Analog courses would use the open device models for the transparency they offer, and would set hand analysis, simulation and layout of the same circuit side by side.

Public funders have a part. The European Chips Act (European Union, 2023) and the United States CHIPS and Science Act (United States Congress, 2022) both treat the shortage of trained designers as a matter of policy. Regular educational shuttle runs on open processes, maintenance of the kits and the open tools, and shared course material are modest items beside the cost of a fabrication plant, and they address the same shortage from the other end. Open kits also widen who can take part: an institution with no foundry relationship and no licence budget can teach the same course as one with both.

The claim made here is conditional. Whether students taught on open kits become better designers, or reach competence sooner, is an empirical question on which systematic evidence has not yet been gathered. Departments that adopt the approach are well placed to gather it, by recording what students complete, what they retain and how they fare when they later meet a commercial flow.

For forty years the practical conditions of teaching chip design have been set by agreements written to protect process technology, not to serve education. Open process design kits lift those conditions for a class of mature processes. They allow a full design flow to be taught, examined, shared and occasionally fabricated without restriction, and they return to the classroom something of the openness of the Mead and Conway period. They do not replace commercial tools or advanced nodes in the training of a designer. Used as the foundation on which those are later introduced, they could make chip design a subject that many more universities are able to teach well.

To be declared by the author(s) before publication.

To be declared by the author(s) before publication.